Funktsionaalprogrammeerimine riistvara disainis ja verifitseerimisel (sügis 2006)


Registreerumine: Kursusele registreerumiseks deklarareerida selle kuulamine vastavalt kehtivale korrale dekanaadis, kuid saata ka meil Tarmo Uustalule aadressil firstname(at)cs.ioc.ee. Tähtaeg: 18.9.2006 kl 17.00.


Kood: ITT9202

Punkte: 2.0 AP

Tunde: 12 tundi loenguid

Tunniplaan: loengud E 25.9., T 26.9, K 27.9, N 28.9. kl 14-17 Küberneetika Maja (Akadeemia tee 21) ruumis B101

Kontrollivorm: eksam

Eksam: Eksamihinde saamiseks tuleb lahendada komplekt koduülesandeid/teostada miniprojekt. Tähtaeg R 20.10.2006!

Õppejõud: dr Gordon Pace, Dept. of CS and AI, University of Malta

Kontakt: Tarmo Uustalu, firstname(at)cs.ioc.ee, 620 4250


Kursus toimub RAKi Meetme 1.1 IKT doktorikooli projekti raames.


Functional Languages for Synchronous Hardware Design and Verification

Dr Gordon Pace
Dept. of CS and AI
University of Malta

Abstract

The abstraction mechanisms and features of modern functional programming languages (FPLs) have been proved to be useful in supporting the design, analysis and verification of hardware. The approach usually taken is that of embedding a domain-specific language, geared towards hardware description and design within the host functional language. Different approaches were taken with different objectives in mind: structural circuit description, circuit placement, hardware compilation, circuit analysis, etc. In this course we will be covering the fundamentals of functional circuit description languages, looking at various examples of such languages and their use. The course will be covering the following topics:

Course material

Useful links


Tarmo Uustalu
Viimane uuendus 29.9.2006